From 745625c8b633c1b0db285cc89791f44c731b3be0 Mon Sep 17 00:00:00 2001
From: Bent Bisballe Nyeng <deva@aasimon.org>
Date: Tue, 16 Jan 2018 21:07:45 +0100
Subject: It works

---
 fpga-toolchain/experiments/Makefile   | 26 ++++++++++++++++++++++
 fpga-toolchain/experiments/pinmap.pcf | 12 ++++++++++
 fpga-toolchain/experiments/top.v      | 42 +++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+)
 create mode 100644 fpga-toolchain/experiments/Makefile
 create mode 100644 fpga-toolchain/experiments/pinmap.pcf
 create mode 100644 fpga-toolchain/experiments/top.v

diff --git a/fpga-toolchain/experiments/Makefile b/fpga-toolchain/experiments/Makefile
new file mode 100644
index 0000000..4f906f7
--- /dev/null
+++ b/fpga-toolchain/experiments/Makefile
@@ -0,0 +1,26 @@
+# Project setup
+PROJ      = blinky
+BUILD     = ./build
+DEVICE    = 8k
+FOOTPRINT = ct256
+
+# Files
+FILES = top.v
+
+.PHONY: all clean burn
+
+all:
+	# if build folder doesn't exist, create it
+	mkdir -p $(BUILD)
+	# synthesize using Yosys
+	yosys -p "synth_ice40 -top top -blif $(BUILD)/$(PROJ).blif" $(FILES)
+	# Place and route using arachne
+	arachne-pnr -d $(DEVICE) -P $(FOOTPRINT) -o $(BUILD)/$(PROJ).asc -p pinmap.pcf $(BUILD)/$(PROJ).blif
+	# Convert to bitstream using IcePack
+	icepack $(BUILD)/$(PROJ).asc $(BUILD)/$(PROJ).bin
+
+burn:
+	iceprog $(BUILD)/$(PROJ).bin
+
+clean:
+	rm build/*
diff --git a/fpga-toolchain/experiments/pinmap.pcf b/fpga-toolchain/experiments/pinmap.pcf
new file mode 100644
index 0000000..89c65d9
--- /dev/null
+++ b/fpga-toolchain/experiments/pinmap.pcf
@@ -0,0 +1,12 @@
+set_io --warn-no-port led1 B5
+set_io --warn-no-port led2 B4
+set_io --warn-no-port led3 A2
+set_io --warn-no-port led4 A1
+set_io --warn-no-port led5 C5
+set_io --warn-no-port led6 C4
+set_io --warn-no-port led7 B3
+set_io --warn-no-port led8 C3
+set_io --warn-no-port hwclk C16
+set_io --warn-no-port mosi F16
+set_io --warn-no-port clkout E14
+set_io --warn-no-port out G14
\ No newline at end of file
diff --git a/fpga-toolchain/experiments/top.v b/fpga-toolchain/experiments/top.v
new file mode 100644
index 0000000..421c0a4
--- /dev/null
+++ b/fpga-toolchain/experiments/top.v
@@ -0,0 +1,42 @@
+// Blink an LED provided an input clock
+/* module */
+module top (hwclk, mosi, led1, led2, led3, led4, led5, led6, led7, led8, clkout , out);
+   /* I/O */
+   input hwclk;
+   input mosi;
+   output led1;
+   output led2;
+   output led3;
+   output led4;
+   output led5;
+   output led6;
+   output led7;
+   output led8;
+	 output clkout;
+	 output out;
+	 wire 	clkout;
+	 
+   /* Counter register */
+   reg [31:0] counter = 32'b0;
+   reg [8:0] 	shiftreg = 9'b1;
+
+   /* LED drivers */
+   assign led1 = shiftreg[0];
+   assign led2 = shiftreg[1];
+   assign led3 = shiftreg[2];
+   assign led4 = shiftreg[3];
+   assign led5 = shiftreg[4];
+   assign led6 = shiftreg[5];
+   assign led7 = shiftreg[6];
+   assign led8 = shiftreg[7];
+
+	 assign clkout = hwclk;
+	 assign out = shiftreg[8];
+
+   /* always */
+   always @ (negedge hwclk)
+		 begin
+    		shiftreg = (shiftreg << 1) + mosi;
+		 end
+
+endmodule
-- 
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